Important questions about Combinational Logic Circuits. Combinational Logic Circuits MCQ questions with answers. Combinational Logic Circuits exam questions and answers for students and interviews.

1. The ________ statement evaluates the variable status.

Options

A : IF/THEN

B : IF/THEN/ELSE

C : CASE

D : ELSIF

2. The 7447A is a BCD-to-7-segment decoder with ripple blanking input and output functions. The purpose of these lines is to ________.

Options

A : turn off the display for any nonsignificant digit

B : turn off the display for any zero

C : turn off the display for leading or trailing zeros

D : test the display to assure all segments are operational

4. A circuit that can convert one of ten numerical keys pressed on a keyboard to BCD is a ________.

Options

A : priority encoder

B : decoder

C : multiplexer

D : demultiplexer

5. In VHDL, data can be each of the following types except ________.

Options

A : BIT

B : BIT_VECTOR

C : STD_LOGIC

D : STD_VECTOR

6. A 4-bit adder has the following inputs: C 0 = 0, A 1 = 0, A 2 = 1, A 3 = 0, A 4 = 1, B 1 = 0, B 2 = 1, B 3 = 1, B 4 = 1. The output will be ________.

Options

A : 01100

B : 10101

C : 11000

D : 00011

7. In an odd-parity system, the data that will produce a parity bit = 1 is ________.

Options

A : data = 1010011

B : data = 1111000

C : data = 1100000

D : All of the above

8. Parity generators and checkers use ________ gates.

Options

A : exclusive-AND

B : exclusive-OR/NOR

C : exclusive-OR

D : exclusive-NAND

9. When an open occurs on the input of a TTL device, the output will ________.

Options

A : go LOW, because there is no current in an open circuit

B : react as if the open input were a HIGH

C : go HIGH, since full voltage appears across an open

D : still be good, if only the good inputs are used

10. A half-adder does not have ________.

Options

A : carry in

B : carry out

C : two inputs

D : all of the above

1. Occasionally, a particular logic expression will be of no consequence in the operation of a circuit, such as in a BCD-to-decimal converter. These result in ________ terms in the K-map and can be treated as either ________ or ________, in order to ________ the resulting term.

Options

A : don't care, 1's, 0's, simplify

B : spurious, AND's, OR's, eliminate

C : duplicate, 1's, 0's, verify

D : spurious, 1's, 0's, simplify

4. Two 4-bit comparators are cascaded to form an 8-bit comparator. The cascading inputs of the most significant 4 bits should be connected ________.

Options

A : to the outputs from the least significant 4-bit comparator

B : to the cascading inputs of the least significant 4-bit comparator

C : A = B to a logic high, A < b and a > B to a logic low

D : ground

5. The AND-OR-INVERT gates are designed to simplify implementation of ________.

Options

A : POS logic

B : DeMorgan's theorem

C : NAND logic

D : SOP logic

7. The final output of a POS circuit is generated by ________.

Options

A : an AND

B : an OR

C : a NOR

D : a NAND

8. When Karnaugh mapping, we must be sure to use the ________ number of loops.

Options

A : maximum

B : minimum

C : median

D : Karnaugh

9. To subtract a signed number (the subtrahend) from another signed number (the minuend) in the 2's complement system, the minuend is ________.

Options

A : complemented only if it is positive

B : complemented only if it is negative

C : always complemented

D : never complemented

10. An 8-bit binary number is input to an odd parity generator. The parity bit will equal 1 only if ________.

Options

A : the number is odd

B : the number of 1s in the number is odd

C : the number is even

D : the number of 1s in the number is even

1. The ________ prefix on IC's indicates a broader operating temperature range, and the devices are generally used by the military.

Options

A : 54

B : 2N

C : 74

D : TTL

2. For the XNOR gate truth table shown below, the values for w , x , y , and z are ____, ____, ____, and ____, respectively.

Options

A : 1, 0, 0, 1

B : 0, 1, 0, 1

C : 1, 1, 1, 0

D : 1, 0, 0, 0

3. A gate that could be used to compare two logic levels and provide a HIGH output if they are equal is a(n) ________.

Options

A : XOR gate

B : XNOR gate

C : NAND gate

D : NOR gate

4. The ________ circuit produces a HIGH output whenever the two inputs are unequal.